Simple Architecture – Scales with Area

  • Turns user program into a series of large circuits
  • Executes 100 ARM instruction equivalents at a time
  • Loops & pipelining happen in place, automatically
    • Over 90% of time spent in short loops
  • Dozens to hundreds of times faster than existing processors
  • Restores performance growth to processor industry!

Keep Existing Code

  • Any GCC language source code unedited
  • No architecture or instruction set to learn
  • No constraints on coding style
  • Breakthrough performance on a wide variety of applications

Low Power

  • Executes 100 ARM instruction equivalents at a time
  • Eliminates huge amount of memory and register operations
    • Over 90% of power consumption in short loops
  • Compact 10M transistor core
  • Runs at 0.7V at all times

Cost Effective

Compact 10M transistor core

  • Standard CMOS processing
  • Standard packaging or core technology
  • Very efficiently uses only the 8 simple functions needed by the Ascenium compiler

Ease of Use/TTM

Nothing to Learn or Hand Optimize

  • Any GCC language source code unedited
  • No special coding style
  • Automated tools
  • No hand optimization
  • No architecture to learn

About Us

Ascenium is a lean team that has invested years in creating its breakthrough computing technology. The principals are…

Pete Foley


Pete is an experienced silicon valley entrepreneur, founder, and CEO – with a passion for innovative processor architectures that address large opportunities. He previously was founder/CEO of Wave Computing and founder/CEO of nBand.

Øyvind Harboe

VP of Engineering

Øyvind brings his engineering management expertise to the team. Beyond broad software and hardware experience, he has specific and critical experience for Ascenium with the entire microprocessor toolchain from implementing a microprocessor to writing a GCC backend to implementing operating system support.

Ascenium’s Address:

51 E  Campbell Ave, Ste 100G

Campbell, CA  95008